Junior FPGA Firmware Developer (EP-ESE-BE-2024-197-GRAE) | |
Published | |
Closing Date | |
Workplace | Geneva, Lake Geneva region, Switzerland |
Category | |
Position | |
Job DescriptionYour responsibilitiesAre you ready to work on cutting-edge technology at the forefront of particle physics? Join our team and contribute to the Phase-II upgrade of the Level-1 Central Trigger (L1CT) system for the renowned ATLAS experiment. We’re seeking a talented FPGA Firmware Developer to play a key role in the evolution of our Central Trigger Processor (CTP) and Muon-to-CTP Interface (MUCTPI). Be part of an ambitious initiative to completely redesign the existing VMEbus-based L1CT system. The upgraded system will feature advanced technologies, including:
As a key contributor, you’ll:
Your profile Skills
Eligibility criteria:
Additional InformationJob closing date: 19.01.2025 at 23:59 hrs CET.Contract duration: 24 months, with a possible extension up to 36 months maximum. Working hours: 40 hours per week Target start date: 01-March-2025 Job reference: EP-ESE-BE-2024-197-GRAE Field of work: Electrical or Electronics Engineering What we offer
About us At CERN, the European Organization for Nuclear Research, physicists and engineers are probing the fundamental structure of the universe. Using the world’s largest and most complex scientific instruments, they study the basic constituents of matter - fundamental particles that are made to collide together at close to the speed of light. The process gives physicists clues about how particles interact, and provides insights into the fundamental laws of nature. Find out more on http://home.cern. Diversity has been an integral part of CERN’s mission since its foundation and is an established value of the Organization. Employing a diverse workforce is central to our success. | |
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In your application, please refer to myScience.ch and reference JobID 66077. |
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