A faster, cheaper method for making transistors and chips

© 2011 EPFL
© 2011 EPFL
It may soon be possible manufacture the miniscule structures that make up transistors and silicon chips rapidly and inexpensively. EPFL scientists are currently investigating the use of dynamic stencil lithography, a recent but not yet perfected method, for creating nanostructures. Faster, less expensive, and better. These are the advantages of dynamic stencil lithography, a new way of fabricating nanostructures, such as the tiny structures on transistors and silicon chips. The principle of the "stencil" technique for making structures at the nanometer scale (a millionth of a millimeter) is simple: a substrate - a Silicon (Si) wafer or flexible plastics - is placed in an evaporator. On top of it stands a stencil with openings, called apertures, about 100-200 nanometers in size. During the metal evaporation, the stencil acts like a mask, and only the metal that passes through the apertures lands on the substrate.
account creation

UM DIESEN ARTIKEL ZU LESEN, ERSTELLEN SIE IHR KONTO

Und verlängern Sie Ihre Lektüre, kostenlos und unverbindlich.



Ihre Vorteile

  • Zugang zu allen Inhalten
  • Erhalten Sie Newsmails für Neuigkeiten und Jobs
  • Anzeigen veröffentlichen

myScience